C. Patrick Yue
Computer Eng. Associate Director & Associate Professor Electrical & Computer Engineering
Contacts
UCSB Department of Electrical Engineering 5159 Harold Frank Hall Santa Barbara, CA 93106
tel: 805-893-7825
fax: 805-893-3262
cpyue@ece.ucsb.edu
Personal web site
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Research Description
High-speed analog IC design in scaled CMOS technology ~~~ CAD and device modeling methodology for high-frequency analog IC design ~~~ Low-power integrated sensors for biomedical and environmental applications
Research Groups
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Biography
Professor Patrick Yue has 15 years of combined experience in academia and the semiconductor industry. His technical expertise and research interests are in the areas of CMOS RF and high-speed IC design, device and passive modeling, and CAD methodology for high-frequency analog ICs. He received his Ph.D. and M.S. degrees in EE from Stanford University in 1998 and 1994, respectively.
~~~ Since 2006, Patrick has been an Associate Professor at UC Santa Barbara in the Department of Electrical and Computer Engineering. He is currently the Associate Director for the Computer Engineering Program. Prior to joining UCSB, he was an Assistant Professor in the ECE Department at Carnegie Mellon University from 2003 to 2006. Patrick is also an active industry consultant and currently serves on the technical advisory boards of several fabless startups. ~~~
Before entering academia, he co-founded Atheros Communications (NSDQ: ATHR) in 1998, where he worked for four years and was a core member of the team that delivered the world’s first single-chip RFIC based on standard digital CMOS processes for the IEEE 802.11 WLAN standard. Atheros' products are widely regarded as the underpinning technology that enabled WiFi. After leaving Atheros, Patrick joined another startup, Aeluros, where he worked on signal integrity and component modeling for 10-Gbps I/O interface circuits based on CMOS technology. While working full time in the industry, Patrick served as a Consulting Assistant Professor in Stanford University’s EE Department. In this role, he supervised doctoral candidates on high-frequency circuit and device research projects. During his graduate study, Patrick has held summer positions at Texas Instruments, Hewlett-Packard Lab, and Stanford University. ~~~
Patrick has contributed to more than fifty peer-reviewed technical papers and two book chapters. He was the co-recipient of the 2003 ISSCC Best Student Paper Award for demonstrating the first on-chip standing-wave clock distribution circuit. His 1998 paper “On-chip spiral inductors with patterned ground shields for Si-based RF ICs” is among the thirty-eight all-time Top Cited Articles in the IEEE Journal of Solid-State Circuits according Thomson ISI. He currently holds a dozen U.S. patents, most of which are employed in commercial products. He has served on the technical program committees of the IEEE RFIC Symposium (RFIC), IEEE Asian Solid-State Circuit Conference (A-SSCC), IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), and IEEE Compound Semiconductor Integrated Circuits Symposium (CSICS). He is a member of the IEEE Electron Devices Society VLSI Technology and Circuits Committee and has been an IEEE Senior Member since 2005.
Awards/Honors
- Best Student Paper, IEEE International Solid-State Circuits Conference (ISSCC), 2003
- All-Time Top Cited Paper in IEEE Journal of Solid-State Circuits (JSSC), 1997
Selected Publications
See complete list of publications
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