Publications:
The following is a current list of publications (both journal and conference) sorted by date, most recent first. Work in progress and workshop papers are listed at the bottom in a seperate section. If you are looking for papers on a particular subject, use the buttons to the right to highlight papers relavent to that area.
Peer-Reviewed Conference and Journal
- Banit Agrawal and Timothy Sherwood High Bandwidth Network Memory System Through Virtual Pipelines IEEE/ACM Transactions on Networking To Appear.
- Mohit Tiwari, Banit Agrawal, Shashidhar Mysore, Jonathan K Valamehr, and Timothy Sherwood. A Small Cache of Large Ranges: Hardware Methods for Efficiently Searching, Storing, and Updating Big Dataflow Tags, Proceedings of the International Symposium on Microarchitecture (Micro), November 2008. Lake Como, Italy
- Ryan Dixon and Timothy Sherwood. Whiteboards that Compute: A Workload Analysis, Proceedings of the 2008 IEEE International Symposium on Workload Characterization, September 2008. Seattle, WA
- Ryan Dixon, Ömer Egecioglu, and Timothy Sherwood. Automata-theoretic Analysis of Bit-split Languages for Packet Scanning, Proceedings of the 13th International Conference on Implementation and Application of Automata (CIAA), July 2008. San Francisco, CA
- Ted Huffmire, Brett Brotherton, Nick Callegari, Jonathan Valamehr, Jeff White, Ryan Kastner, and Tim Sherwood. Designing Secure Systems on Reconfigurable Hardware, ACM Transactions on Design Automation of Electronic Systems (TODAES) Vol 13 No 3, July 2008.
- Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timothy Levin. Enforcing Memory Policy Specifications in Reconfigurable Hardware, Computers & Security To Appear
- Ted Huffmire, Brett Brotherton, Timothy Sherwood, Ryan Kastner, Timothy Levin, Thuy Nguyen, and Cynthia Irvine. Managing Security in the Design of FPGA Based Embedded Systems, IEEE Design & Test of Computers To Appear
- Shashidhar Mysore, Banit Agrawal, Rodolfo Neuber, Timothy Sherwood, Nisheeth Shrivastava, and Subhash Suri. Formulating and Implementing Profiling over Adaptive Ranges, In ACM Transactions on Architecture and Code Optimization (TACO). Vol 5 No 1, May 2008.
- Banit Agrawal and Timothy Sherwood. Ternary CAM Power and Delay Model: Extensions and Uses, In IEEE Transactions on Very Large Scale Integration Systems (TVLSI). Vol 16 No 5, May 2008.
- Shashidhar Mysore, Bita Mazloom, Banit Agrawal, and Timothy Sherwood. Understanding and Visualizing Full Systems with Data Flow Tomography, Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2008. Seattle, WA
- Shashidhar Mysore, Banit Agrawal, Frederic T. Chong, and Timothy Sherwood Exploring the Processor and ISA Design for Wireless Sensor Network Applications , Proceedings of the International Conference on VLSI Design January 2008. Hyderabad, India
- Banit Agrawal, Timothy Sherwood, Chulho Shin, Simon Yoon Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation , Proceedings of the International Conference on VLSI Design January 2008. Hyderabad, India
- Greg Hoover, Timothy Sherwood, and Forrest Brewer. Towards Understanding Architectural Tradeoffs in MEMS Closed-Loop Feedback Control, Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), October 2007. Salzburg, Austria
- Ted Huffmire, Brett Brotherton, Gang Wang, Tim Sherwood, Ryan Kastner, Timothy Levin, Thuy Nguyen, Cynthia Irvine. Moats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems, Proceedings of the IEEE Symposium on Security and Privacy (Oakland S&P) March 2007. Oakland, CA
- Shashidhar Mysore, Banit Agrawal, Sheng-Chih Lin, Navin Srivastava, Kaustav Banerjee and Timothy Sherwood. 3D-Integration for Introspection, IEEE Micro: Micro's Top Picks from Computer Architecture Conferences (IEEE Micro - top pick), January-February 2007.
- Banit Agrawal and Timothy Sherwood. Virtually Pipelined Network Memory, Proceedings of the International Symposium on Microarchitecture (Micro), December 2006. (nominated for best paper) Orlando, FL
- Shashidhar Mysore, Banit Agrawal, Sheng-Chih Lin, Navin Srivastava, Kaustav Banerjee and Timothy Sherwood. Introspective 3D Chips, Proceedings of the Twelfth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2006. San Jose, CA
- Banit Agrawal and Timothy Sherwood. Guiding Architectural SRAM Models, Proceedings of the International Conference of Computer Design (ICCD), October 2006. San Jose, CA
- Greg Hoover, Timothy Sherwood, Forrest Brewer. A Case Study of Multi-Threading in the Embedded Space, Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), October 2006. Seoul, Korea
- Greg Hoover, Timothy Sherwood, Forrest Brewer. Extensible Control Architectures, Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), October 2006. Seoul, Korea
- Anahita Shayesteh, Glenn Reinman, Norman Jouppi, Suleyman Sair and Timothy Sherwood. Improving the Performance and Power Efficiency of Shared Helpers in CMPs, Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), October 2006. Seoul, Korea
- Ted Huffmire, Shreyas Prasad, Tim Sherwood and Ryan Kastner. Policy-Driven Memory Protection for Reconfigurable Hardware, Proceedings of the European Symposium on Research in Computer Security (ESORICS), September 2006. Hamburg, Germany
- Ted Huffmire and Timothy Sherwood. Wavelet-Based Phase Classification, Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT), September 2006. Seattle, WA
- Yan Meng, Timothy Sherwood, and Ryan Kastner. Leakage Power Reduction of Embedded Memories on FPGAs Through Location Assignment, Proceedings of the 43nd Design Automation Conference (DAC), June 2006. San Francisco, CA
- Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sheng-Chih Lin, Timothy Sherwood, Kaustav Banerjee. A Thermally-Aware Performance Analysis of Vertically Integrated (3-D) Processor-Memory Hierarchy, Proceedings of the 43nd Design Automation Conference (DAC), June 2006. San Francisco, CA
- Lin Tan, Brett Brotherton, and Timothy Sherwood. Bit-Split String-Matching Engines for Intrusion Detection and Prevention, ACM Transactions on Architecture and Code Optimization (TACO), Vol 3 No 1, June 2006.
- Priya Nagpurkar, Hussam Mousa, Chandra Krintz, and Timothy Sherwood. Efficient Remote Profiling for Resource-Constrained Devices Transactions on Architecture and Code Optimization (TACO) Vol 3 No 1, June 2006.
- Shashidhar Mysore, Banit Agrawal, Timothy Sherwood, Nisheeth Shrivastava, and Subhash Suri. Profiling over Adaptive Ranges. (best paper award) Proceedings of the International Symposium on Code Generation and Optimization (CGO'06) March 2006. New York, New York.
- Banit Agrawal and Timothy Sherwood. Modeling TCAM Power for Next Generation Network Devices. IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS'06), March 2006. Austin, Texas
- Greg Hamerly, Erez Perelman, Jeremy Lau, Brad Calder, Timothy Sherwood. Using Machine Learning to Guide Architecture Simulation, Journal of Machine Learning Research (JMLR) 7:343--378, Feb-2006.
- Eren Kursun, Anahita Shayesteh, Suleyman Sair, Tim Sherwood and Glenn Reinman. An Evaluation of Deeply Decoupled Cores, Instruction-Level Parallelism (JILP) vol. 8 Feb 2006.
- Lin Tan and Timothy Sherwood. Architectures for Bit-Split String Scanning in Intrusion Detection IEEE Micro: Micro's Top Picks from Computer Architecture Conferences (IEEE Micro - top pick), January-February 2006.
- Yan Meng, Wenrui Gong, Ryan Kastner, and Timothy Sherwood. Algorithm/Architecture Co-exploration for Designing Energy Efficient Wireless Channel Estimator. J. Low Power Electronics 1, 238 24(JLPE) December 2005.
- Anahita Shayesteh, Eren Kursun, Tim Sherwood, Suleyman Sair, and Glenn Reinman. Reducing the Latency and Area Cost of Core Swapping through Shared Helper Engines, IEEE International Conference on Computer Design (ICCD 2005), Oct 2005. San Jose, CA
- Yan Meng, Timothy Sherwood and Ryan Kastner. Exploring the Limits of Leakage Power Reduction in Caches, ACM Transactions on Architecture and Code Optimization (TACO), September 2005.
- Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timothy Sherwood, Hua Lee, and Ryan Kastner. MP Core: Algorithm and Design Techniques for Efficient Channel Estimation in Wireless Applications, Proceedings of the 42nd Design Automation Conference (DAC 2005), June 2005. Anaheim, CA
- Brad Calder, Timothy Sherwood, Greg Hamerly, and Erez Perelman. SimPoint: Picking Representative Samples to Guide Simulation Chapter 7 from the book "Performance Evaluation and Benchmarking" edited by Lizy Kurian John and Lieven Eeckhout. (unoffical preprint) CRC Press, 2005
- Lin Tan, Timothy Sherwood. A High Throughput String Matching Architecture for Intrusion Detection and Prevention, (errata) (ppt) In the proceedings of the 32nd Annual Intl. Symposium on Computer Architecture (ISCA 2005), June 2005. Madison, Wisconsin
- Jeremy Lau, Erez Perelman, Greg Hamerly, Timothy Sherwood, Brad Calder. Motivation for Variable Length Intervals and Hierarchical Phase Behavior, 2005 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS'05), March 2005
- Priya Nagpurkar, Chandra Krintz, Timothy Sherwood. Phase-Aware Remote Profiling, Proceedings of the International Symposium on Code Generation and Optimization (CGO'05) March 2005. San Jose, California.
- Yan Meng, Timothy Sherwood and Ryan Kastner. On the Limits of Leakage Power Reduction in Caches, Proceedings of International Symposium on High-Performance Computer Architecture. (HPCA-11), February 2005. San Francisco, California.
- Timothy Sherwood, Mark Oskin, Brad Calder. Balancing Design Options with Sherpa, In the proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems. (CASES'04), September 2004. Washington D.C.
- Brad Calder, Todd Austin, Don Yang, Timothy Sherwood, Suleyman Sair, David Newquist and Tim Cusac. BitRaker Anvil: Binary Instrumentation for Rapid Creation of Simulation and Workload Analysis Tools Proceedings of Global Signal Processing (GSPx), September, 2004.
- Michael Van Biesbrouck, Timothy Sherwood, and Brad Calder A Co-Phase Matrix to Guide Simultaneous Multithreading Simulation. 2004 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS'04), March 2004.
- Nathan Tuck, Timothy Sherwood, Brad Calder, and George Varghese Deterministic Memory-Efficient String Matching Algorithms for Intrusion Detection. The 23rd Conference of the IEEE Communications Society (INFOCOM'04), March 2004.
- Timothy Sherwood, Erez Perelman, Greg Hamerly, Suleyman Sair, and Brad Calder. Discovering and Exploiting Program Phases. (unofficial pdf) IEEE Micro: Micro's Top Picks from Computer Architecture Conferences (IEEE Micro - top pick), November-December 2003.
- Jeremy Lau, Stefan Schoenmackers, Timothy Sherwood, and Brad Calder. Reducing Code Size With Echo Instructions. International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), October 2003.
- Timothy Sherwood, George Varghese, and Brad Calder. A Pipelined Memory Architecture for High Throughput Network Processors, In the proceedings of the 30th Annual Intl. Symposium on Computer Architecture (ISCA 2003), June 2003. San Diego, California
- Timothy Sherwood, Suleyman Sair, and Brad Calder. Phase Tracking and Prediction, In the proceedings of the 30th Annual Intl. Symposium on Computer Architecture (ISCA 2003), June 2003. San Diego, California
- Suleyman Sair, Timothy Sherwood, and Brad Calder. A Decoupled Predictor-Directed Stream Prefetching Architecture, IEEE Transactions on Computers, Vol 52 No 5, May 2003
- Satish Narayanasamy, Timothy Sherwood, Suleyman Sair, Brad Calder, and George Varghese. Catching Accurate Profiles in Hardware, In the proceedings of the 9th International Symposium on High-Performance Computer Architecture (HPCA-9), February 2003. Anaheim, California.
- Timothy Sherwood, Erez Perelman, Greg Hamerly and Brad Calder. Automatically Characterizing Large Scale Program Behavior, In the proceedings of the Tenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2002), October 2002. San Jose, California (pdf-slides, ppt-slides)
- S. Mahlke, R. Ravindran, M. Schlansker, R. Schreiber, and T. Sherwood. Bitwidth cognizant architecture synthesis of custom hardware accelerators, In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Volume: 20, Issue: 11, Page(s): 1355 -1371, Nov 2001
- Suleyman Sair, Timothy Sherwood, and Brad Calder. Quantifying Load Stream Behavior, In the proceedings of the 8th International Symposium on High-Performance Computer Architecture (HPCA-8), February 2002. Cambridge, Massachusetts
- Timothy Sherwood and Brad Calder. Patchable Instruction ROM Architecture, International Conference on Compiler, Architecture, and Synthesis for Embedded Systems (CASES 2001), November 2001. Atlanta, Georgia
- Timothy Sherwood, Erez Perelman and Brad Calder. Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications, In the proceedings of the Intl. Conference on Parallel Architectures and Compilation Techniques (PACT 2001), Sept 2001. Barcelona, Spain (slides)
- Timothy Sherwood and Brad Calder. Automated Design of Finite State Machine Predictors for Customized Processors, In the proceedings of the 28th Annual Intl. Symposium on Computer Architecture (ISCA 2001), June 2001. Göteborg, Sweden
- S. Mahlke, R. Ravindran, M. Schlansker, R. Schreiber, and T. Sherwood. Bitwidth Sensitive Code Generation in a Custom Embedded Accelerator Design System, In the proceedings of the 5th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2001) , March, 2001. St. Goar, Germany.
- Timothy Sherwood, Suleyman Sair, and Brad Calder. Predictor-Directed Streaming Buffers, In the proceedings of the 33rd Annual International Symposium on Microarchitecture (Micro-33), December 2000. Monterey, California.
- Timothy Sherwood and Brad Calder. Loop Termination Prediction, In the proceedings of The Third International Symposium on High Performance Computing (ISHPC2K), October 2000. Toyko, Japan.
- Timothy Sherwood and Brad Calder. Toolblocks: An Infrastructure for the Construction of Memory Hierarchy Analysis Tools In the proceedings of the European Conference on Parallel Computing (Euro-Par), August 2000. Muinch, Germany.
- Bryan Talbot, Timothy Sherwood, and Bill Lin. Cached IP Lookup for Terabit Speed Routers In the Proceedings of the IEEE Global Communications Conference (GlobeCom), December 1999.
- Mark Oskin, Frederic T. Chong, and Timothy Sherwood. ActiveOS: Virtualizing Intelligent Memory, In the Proceedings of the International Conference on Computer Design (ICCD), October 1999. Austin, Texas.
- Timothy Sherwood, Brad Calder, and Joel Emer. Reducing Cache Misses Using Hardware and Software Page Placement, In the Proceedings of the International Conference on Supercomputing (ICS), June 1999.
- Mark Oskin, Frederic T. Chong, and Timothy Sherwood. Active Pages: A Model of Computation for Intelligent Memory. In the 1998 International Symposium on Computer Architecture (ISCA), June 1998. Barcelona, Spain.
Workshops and Work-in-progress
- Ted Huffmire, Jonathan Valamehr, Timothy Sherwood, Ryan Kastner, Timothy Levin, Thuy D. Nguyen, and Cynthia Irvine Trustworthy System Security through 3-D Integrated Hardware Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust (HOST-2008) June 2008. Anaheim, CA
- Ryan Dixon and Timothy Sherwood Whiteboards that Compute: Goals and Challenges for System Designers Wild and Crazy Ideas VI (ASPLOS Abstract and Short Talk) March 2008.
- Banit Agrawal, Navin Srivastava, Frederic T. Chong, Kaustav Banerjee, Timothy Sherwood Nano-enhanced Architectures: Using Carbon Nanotube Interconnects in Cache Design Proceedings of the 4th Workshop on Non-Silicon Computing (ISCA Workshop) June 2007.
- Susmit Biswas, Tzvetan S. Metodi, Frederic T. Chong, Ryan Kastner, and Timothy Sherwood Efficient Storage of Defect Maps for Nanoscale Memory Proceedings of the 4th Workshop on Non-Silicon Computing (ISCA Workshop) June 2007.
- Yan Meng, Ryan Kastner, and Timothy Sherwood. Invited paper: Algorithm/Architecture Co-exploration for Designing Energy Efficient Wireless Channel Estimator Mobile Computing Hardware Architectures: Design and Implementation (MOCHA) January 2006.
- Anahita Shayesteh, Glenn Reinman, Norman Jouppi, Suleyman Sair, and Timothy Sherwood. Dynamically Configurable Shared CMP Helper Engines for Improved Performance, Micro-38 Workshop on Design, Architecture and Simulation of Chip Multi-Processors (Micro Workshop). November 2005. Barcelona, Spain.
- Wenrui Gong, Yan Meng, Ryan Kastner, and Timothy Sherwood. Data Partitioning for Reconfigurable Architectures with Distributed Block RAM, Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), June 2005. Las Vega, NV
- Eren Kursun, Glenn Reinman, Suleyman Sair, Anahita Shayesteh, and Tim Sherwood. Low-Overhead Core Swapping for Thermal Management, Micro-37 Workshop on Power-Aware Computer Systems (Micro Workshop). December 2004. Portland Oregon
- Erez Perelman, Greg Hamerly, Michael Van Biesbrouck, Timothy Sherwood, and Brad Calder. Using SimPoint for Accurate and Efficient Simulation, International Conference on Measurement and Modeling of Computer Systems (SIGMetrics extended abstract), June 2003.
- Timothy Sherwood and Brad Calder. Time Varying Behavior of Programs, UC San Diego Technical Report UCSD-CS99-630, August 1999.
- Mark Oskin, Frederic T. Chong, Aamir Farooqui, Timothy Sherwood, and Justin Hensley. Low Power Design of Page-Based Intelligent Memory In the Workshop on Power-Driven Microarchitecture held with the 1998 International Symposium on Computer Architecture (ISCA workshop), June 1998. Barcelona, Spain.
- Mark Oskin, Timothy Sherwood, Justin Hensley, Sinclair Yeh, and Frederic T. Chong. Sharing Data in Page-Based Intelligent Memory In the Seventh Workshop on Scalable Shared-memory Multiprocessors held with the 1998 International Symposium on Computer Architecture (ISCA workshop), June 1998. Barcelona, Spain.